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ML674001Series
The ML674K/ML675K family is a general-purpose 32-bit, RISC-based microcontrollers (MCUs) using the high-speed, low-power ARM7TDMI™ as a core CPU. The product lineup includes the ML674 family for low-end MCUs and the ML675K family with internal cache memory for middle-end MCUs. It is ideal as a general-purpose 32-bit embedded MCU for application to a wide range of products including PC peripherals, digital consumer electronics, and digital communication. The ML674K family is also suitable as an entry model when transitioning from 16-bit MCUs to de facto 32-bit MCUs for embedded applications. The ML674K/ML675K family of MCUs is based on OKI's originalμPLAT®system LSI development integration platform. This makes it easy to incorporate peripheral IPs and enables custom MCU expansion to be suited for a variety of applications.
Examples of Application
DVD drives, communication equipment, game consoles, instrumentation and controllers, etc.
Features
- High cost performance
- High object efficiency using Thumb™ instructions
- Upward software compatible
- External memory controller :
ROM/FLASH, SRAM, I/O, SDRAM/EDO DRAM - Power consumption control function :
STANDBY/HALT mode, clock stop function in module units
Clock gear (1/1, 1/2, 1/4, 1/8, 1/16, 1/32 (1/32: ML675K Family only))
Major Specifications
| ML674001 Series | |||
| Part Number | ML674001 | ML67Q4002 | ML67Q4003 |
| CPU Platform | µPLAT-7B | ||
| CPU Core | ARM7TDMI® | ||
| Clock | 1 to 33MHz (29MIPS) | ||
| Cache Memory | none | ||
| Internal ROM | ROM-less | 256KB | 512KB |
| Internal RAM | 32KB | ||
| External Memory Controller | ROM/Flash, SRAM, DRAM | ||
| 4 I/O banks | |||
| DMA | 2 channels | ||
| Interrupt Controller | internal: 23/external: 5 | ||
| System Timer | 16-bit x 1 channel | ||
| Expanded Timer | 16-bit x 6 channels | ||
| PWM | 16-bit x 2 | ||
| WDT | 16-bit | ||
| Serial Interface | 4 channels: UART x2, SSIO, I2C | ||
| GPIO | 42-bit | ||
| A/DC | 10-bit x 4 channels | ||
| Power Management | Standby (all clocks stopped) Halt (clock signal to CPU or other component stopped) | ||
| Clock gear (1/1, 1/2, 1/4, 1/8, 1/16) | |||
| Power Supply | Core: 2.5V (10%), I/Os: 3.3V (10%) | ||
| Operating Current | Core: 25mA max., I/O: 30mA max (@16MHz) | ||
| Power-down Current | STANDBY: core 45µA max, I/O 5µA max. (Ta = 25°C) | ||
| HALT: core 15mA max, I/O 5mA max (@16MHz) | |||
| Operating Temperature | -40 to +85°C | ||
| Packages | 144-LQFP (20 x 20mm), 144-FBGA (11 x 11mm) | ||
Block Diagram
