Hands-free Echo/Noise Canceller LSI ML7037-003

General

The ML7037-003 is an IC device developed for portable, handsfree communication with built-in line echo cancerler, acoustic echo canceler, and transmission signal noise canceler. Built-in to the voice signal interface is a Linear CODEC for the analog interface on the acoustic-side, and another Linear CODEC for the analog interface on the line-side. On the line-side, In addition to the analog interface, there is also a µ-law PCM/16-bit linear PCM digital interface.
The ML7037-003 is performance-enhanced successor device to the ML7731 has achieved more than 10 million pieces sales record. The ML7037-003 is ideally suited for a handsfree system.

¥datasheet[PDF]

¥Evaluation Kit Manual [PDF]

Features

• Single 3.3 V Power Supply Operation (3.0 to 3.6 V)
      [with built-in regulator to generate internal power supply]
• Built-in 2-channel (line and acoustic) echo canceler
    -Echo attenuation : 67 dB (typ.) for white noise including NLP
    -Cancelable echo delay time : 
      •Acoustic echo canceler = 64 ms (max)
      •Line echo cancelers = 20 ms (max)
• Built-in transmission signal noise canceler
    -Noise attenuation : 6, 9, 13, 18 dB (typ.) for white noise
• Built-in 2-channel CODEC's
    -Analog input style     : Acoustic side = Differential or Single input
                                    : Line-side = Single input
    -Analog input gain amp's : Acoustic side = 34dB (max : with 2-stage amps)
                                         : Line-side = 20dB (max)
    -Analog output configuration   : Push-pull drive (can drive a 2.0 kΏ load)
• Receive-side ALC (Automatic Level Control)
• Programmable Gain/Mute
• A slope filter on transmit side
• 16 GPI's and 8 GPO's
• Speech digital interface coding formats : µ-law PCM (G.711 [64kbps]),
                                                                16-bit linear (2's complement)
• Speech digital interface sync formats : Long-frame-sync, short-frame-sync
• PCM shift clock (BCLK)
    -Clock slave mode : 64kHz to 2.048MHz (µ-law PCM)
                                 128kHz to 2.048MHz (16bit Linear PCM)
    -Clock master mode : 64kHz (µ-law PCM)
                                    128kHz (16bit Linear PCM)
• Master clock frequency : 12.288 MHz
   (crystal unit the ML7037's built-in driving circuit for a crystal unit or a crystal oscillator)
• Transmission signal equalizer
• Package : 64-pin plastic TQFP (TQFP64-P-1010-0.50-K) (ML7037-003TB)

Functional Block Diagram

Magnified Figure

Reference Circuit Diagram in MCU mode

The following is an example of connection when the line-side interface is assumed to be a Bluetooth.

Magnified Figure

Evaluation Kit

(under preparation for the 2nd generation kit)

Document Inquiries

The following documents are available on request to comm@oki.com. Your email is requested to specify which below you like to get.

• Application Manual [under preparation]
• Evaluation Kit Manual [under preparation]
• IBIS Model
• Sample Driver (C Source Code for PIC)
• Sample Driver (C Source Code for ARM [ML674051/674061])

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